The disclosures herein relate generally to information handling systems (IHSs), and more specifically, to cache memory systems that IHSs employ.
Information handling system (IHSs) employ processors that process information or data. Current day processors frequently include one or more processor cores on a common integrated circuit (IC) die. A processor IC may also include one or more high-speed cache memories to match a processor core to a system memory that typically operates at significantly slower speeds than a processor core and the cache memory. The cache memory may be on the same integrated circuit (IC) chip as the processor or may be external to a processor IC. Processor cores typically include a load-store unit (LSU) that handles load and store requests for that processor core. Before accessing system memory, the processor attempts to satisfy a load request from the contents of the cache memory. In other words, before accessing system memory in response to a load or store request, the processor first consults the cache memory.